This article treats the gate driver system for IGBT modules in Medium-Voltage (MV) applications. The study focuses principally on two functions of an IGBT gate driver: an impulse signal transmission and a power transmission. For each function, the suitable topology is proposed. Then, for safety and device's protection reason, all gate driver functions must sustain the high and very high galvanic insulation voltage capabilities. For low-cost design, the insulation system can be achieved with the help of the insulating material in a pot core planar transformer. Therefore, for each function, the optimized design of a pot-core transformer and its associated electronics components is performed with the help of a virtual prototyping tool (a genetic algorithm: GA code in MATLABTM). The first section focuses on optimization design of a selected topology for an impulse signal transmission function. A bi-objective (maximize the output voltage vout and minimize the input current imos) problem of this function that leads to a Pareto front is presented. Several Pareto fronts’ results are obtained assuming different insulation layers thickness. The second part focuses on optimization design of a selected topology for a power transmission function. Maximize the converter efficiency (ηcon) and minimize the output power (Pout) are considered as a bi-objective. Thus, numerous Pareto fronts’ results are achieved for a few different insulation thicknesses. Finally, the prototype of a single channel IGBT gate driver is invented to validate the proposed design.
| Published in | Journal of Electrical and Electronic Engineering (Volume 9, Issue 1) |
| DOI | 10.11648/j.jeee.20210901.13 |
| Page(s) | 16-25 |
| Creative Commons |
This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited. |
| Copyright |
Copyright © The Author(s), 2021. Published by Science Publishing Group |
IGBT Gate Driver, Medium-Voltage Converter, Insulated Transformer, Dielectric Material
| [1] | F. Wang, Z. Zhang, T. Ericsen, R. Raju, R. Burgos and D. Boroyevich, "Advances in Power Conversion and Drives for Shipboard Systems," in Proceedings of the IEEE, vol. 103, no. 12, pp. 2285-2311, Dec. 2015. |
| [2] | Nounou, K., Benbouzid, M., Marouani, K. et al. Performance comparison of open-circuit fault-tolerant control strategies for multiphase permanent magnet machines for naval applications. Electr Eng 100, 1827–1836 (2018) doi: 10.1007/s00202-017-0661-9. |
| [3] | Holtz, J., Krah, J. O. “On-line identification of the resonance conditions in the overhead supply line of electric railways” Archiv f. Elektrotechnik 74, 99–106 (1990) doi: 10.1007/BF01573236. |
| [4] | Am, S.; ‘Power modules design and optimization for medium power of MMC inverters. High insulation voltage gate driver system and 3D packaging,’ PhD dissertation, G2Elab, 2016, available at https://hal.archives-ouvertes.fr/tel-01534816v1 |
| [5] | S. Am, P. Lefranc and D. Frey, "Design methodology for optimising a high insulation voltage insulated gate bipolar transistor gate driver signal transmission function", IET Power Electron., vol. 8, no. 6, pp. 1035-1042, 2015. |
| [6] | P. Lefranc, X. Jannot and P. Dessante, "Optimised design of a transformer and an electronic circuit for IGBT drivers signal impulse transmission function based on a virtual prototyping tool", IET Power Electronics, vol. 6, no. 4, pp. 625-633, April 2013. |
| [7] | S. Am, P. Lefranc, D. Frey and M. Ibrahim, "Design methodology for a high insulation voltage power transmission function for IGBT gate driver," 2016 IEEE Applied Power Electronics Conference and Exposition (APEC), Long Beach, CA, USA, 2016, pp. 2401-2408, doi: 10.1109/APEC.2016.7468202. |
| [8] | Sockea Am, Pierre Lefranc, David Frey., “A Virtual Prototyping Tool of a Power Transmission Function for IGBT Gate Drivers with High Insulated Voltage Capabilities.” CIPS: International Conference on Integrated Power Electronics Systems 2016, Mar 2016, Nuremberg, Germany. |
| [9] | M. Glinka and R. Marquardt, "A new AC/AC multilevel converter family," in IEEE Transactions on Industrial Electronics, vol. 52, no. 3, pp. 662-669, June 2005, doi: 10.1109/TIE.2005.843973. |
| [10] | N. Li, Y. Wang, R. Niu, W. Guo, W. Lei and Z. Wang, "A novel neutral point voltage automatic balancing carrier-based modulation strategy of three-level NPC converter," 2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE ASIA), Hiroshima, Japan, 2014, pp. 475-479, doi: 10.1109/IPEC.2014.6869626. |
| [11] | V. Dargahi, et al. "Flying Capacitors Reduction in an Improved Double Flying Capacitor Multicell Converter Controlled by a Modified Modulation," in IEEE Transactions on Power Electronics, vol. 27, no. 9, pp. 3875-3887, Sept. 2012, doi: 10.1109/TPEL.2012.2188647. |
| [12] | V. Sonti, et al. "Analysis for the Minimization of Leakage and Common Mode Currents in Cascaded Half-Bridge PV Fed Multilevel Inverter," IEEE JESTPE, vol. 7, no. 4, pp. 2443-2452, 2019. |
| [13] | V.-S. Nguyen, et al. “Gate driver supply architecture for common mode conducted EMI reduction in series connection of multiple power devices,” IEEE TPEL, 2018. |
| [14] | S. Djuric, G. Stojanovic, M. Damnjanovic, M. Radovanovic and E. Laboure, "Design, Modeling, and Analysis of a Compact Planar Transformer," in IEEE Transactions on Magnetics, vol. 48, no. 11, pp. 4135-4138, Nov. 2012, doi: 10.1109/TMAG.2012.2202642. |
| [15] | S. Am, P. Lefranc, D. Frey and R. Hanna, "Design methodology for very high insulation voltage capabilities power transmission function for IGBT gate drivers based on a virtual prototyping tool", IET Power Electronics, vol. 10, no. 5, pp. 545-554, 2017. |
| [16] | B. Sarrazin, R. Hanna, P. Lefranc, S. Am, F. Dumas and J. P. Lavieville, "Insulated power supply for gate drivers up to 40 kV for medium-voltage direct current applications", IET Power Electronics, vol. 10, no. 15, pp. 2143-2148, 2017. |
| [17] | Chwei-Sen Wang, O. H. Stielau and G. A. Covic, "Design considerations for a contactless electric vehicle battery charger," in IEEE Transactions on Industrial Electronics, vol. 52, no. 5, pp. 1308-1314, Oct. 2005, doi: 10.1109/TIE.2005.855672. |
| [18] | Z. Huang, S. Wong and C. K. Tse, "Design methodology of a series-series inductive power transfer system for electric vehicle battery charger application," 2014 IEEE Energy Conversion Congress and Exposition (ECCE), Pittsburgh, PA, USA, 2014, pp. 1778-1782, doi: 10.1109/ECCE.2014.6953633. |
| [19] | AL-Kandari, A. M., EL-Naggar, K. M. A genetic-based algorithm for optimal estimation of input–output curve parameters of thermal power plants. Electr Eng 89, 585–590 (2007) doi: 10.1007/s00202-006-0047-x. |
| [20] | Chen, G.; et al. "Parameter Optimization of the LC filters Based on Multiple Impact Factors for Cascaded H-bridge Dynamic Voltage Restorers," JPE, 2014. |
| [21] | Liu, S.; et al. "Study on the Parameter Optimization of Soft-switching DC/DC Converters with the Response Surface Methodology, a SPICE Model, and a Genetic Algorithm," JPE, 2015. |
| [22] | Magnetics, " Ferrite core Magnetic Catalog: Applications and Material," Magnetics International 13/F 1-3 Chatham Road South Tsim Sha Tsui Kowloon, Hong Kong 2017 (website: www.mag-inc.com). |
APA Style
Sokchea Am, Phok Chrin, Bunthern Kim, Lim Phing. (2021). A Single Channel IGBT Gate Drivers for Medium Voltage Converters. Journal of Electrical and Electronic Engineering, 9(1), 16-25. https://doi.org/10.11648/j.jeee.20210901.13
ACS Style
Sokchea Am; Phok Chrin; Bunthern Kim; Lim Phing. A Single Channel IGBT Gate Drivers for Medium Voltage Converters. J. Electr. Electron. Eng. 2021, 9(1), 16-25. doi: 10.11648/j.jeee.20210901.13
AMA Style
Sokchea Am, Phok Chrin, Bunthern Kim, Lim Phing. A Single Channel IGBT Gate Drivers for Medium Voltage Converters. J Electr Electron Eng. 2021;9(1):16-25. doi: 10.11648/j.jeee.20210901.13
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Download@article{10.11648/j.jeee.20210901.13,
author = {Sokchea Am and Phok Chrin and Bunthern Kim and Lim Phing},
title = {A Single Channel IGBT Gate Drivers for Medium Voltage Converters},
journal = {Journal of Electrical and Electronic Engineering},
volume = {9},
number = {1},
pages = {16-25},
doi = {10.11648/j.jeee.20210901.13},
url = {https://doi.org/10.11648/j.jeee.20210901.13},
eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.jeee.20210901.13},
abstract = {This article treats the gate driver system for IGBT modules in Medium-Voltage (MV) applications. The study focuses principally on two functions of an IGBT gate driver: an impulse signal transmission and a power transmission. For each function, the suitable topology is proposed. Then, for safety and device's protection reason, all gate driver functions must sustain the high and very high galvanic insulation voltage capabilities. For low-cost design, the insulation system can be achieved with the help of the insulating material in a pot core planar transformer. Therefore, for each function, the optimized design of a pot-core transformer and its associated electronics components is performed with the help of a virtual prototyping tool (a genetic algorithm: GA code in MATLABTM). The first section focuses on optimization design of a selected topology for an impulse signal transmission function. A bi-objective (maximize the output voltage vout and minimize the input current imos) problem of this function that leads to a Pareto front is presented. Several Pareto fronts’ results are obtained assuming different insulation layers thickness. The second part focuses on optimization design of a selected topology for a power transmission function. Maximize the converter efficiency (ηcon) and minimize the output power (Pout) are considered as a bi-objective. Thus, numerous Pareto fronts’ results are achieved for a few different insulation thicknesses. Finally, the prototype of a single channel IGBT gate driver is invented to validate the proposed design.},
year = {2021}
}
TY - JOUR T1 - A Single Channel IGBT Gate Drivers for Medium Voltage Converters AU - Sokchea Am AU - Phok Chrin AU - Bunthern Kim AU - Lim Phing Y1 - 2021/02/26 PY - 2021 N1 - https://doi.org/10.11648/j.jeee.20210901.13 DO - 10.11648/j.jeee.20210901.13 T2 - Journal of Electrical and Electronic Engineering JF - Journal of Electrical and Electronic Engineering JO - Journal of Electrical and Electronic Engineering SP - 16 EP - 25 PB - Science Publishing Group SN - 2329-1605 UR - https://doi.org/10.11648/j.jeee.20210901.13 AB - This article treats the gate driver system for IGBT modules in Medium-Voltage (MV) applications. The study focuses principally on two functions of an IGBT gate driver: an impulse signal transmission and a power transmission. For each function, the suitable topology is proposed. Then, for safety and device's protection reason, all gate driver functions must sustain the high and very high galvanic insulation voltage capabilities. For low-cost design, the insulation system can be achieved with the help of the insulating material in a pot core planar transformer. Therefore, for each function, the optimized design of a pot-core transformer and its associated electronics components is performed with the help of a virtual prototyping tool (a genetic algorithm: GA code in MATLABTM). The first section focuses on optimization design of a selected topology for an impulse signal transmission function. A bi-objective (maximize the output voltage vout and minimize the input current imos) problem of this function that leads to a Pareto front is presented. Several Pareto fronts’ results are obtained assuming different insulation layers thickness. The second part focuses on optimization design of a selected topology for a power transmission function. Maximize the converter efficiency (ηcon) and minimize the output power (Pout) are considered as a bi-objective. Thus, numerous Pareto fronts’ results are achieved for a few different insulation thicknesses. Finally, the prototype of a single channel IGBT gate driver is invented to validate the proposed design. VL - 9 IS - 1 ER -
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